PDC4S:\Coding\GATE 2021 RavindraBabu Ravula\Digital Logic Design\4.Design and Synthesis of Combinational circuits

Up one directory...
NameSizeDate Modified
1.Introduction to Logic Design.m4v75,836 KB12/12/2021 1:36 AM
10.Comparator.mp433,937 KB12/12/2021 1:36 AM
11.Introduction to MUX.mp493,776 KB12/12/2021 1:36 AM
12.Proving MUX is functionally complete.mp440,156 KB12/12/2021 1:36 AM
13.Implementing functions with MUX example 1.mp4107,874 KB12/12/2021 1:36 AM
14.Implementing functions with MUX example 2.mp419,572 KB12/12/2021 1:36 AM
15.multiplexer with enable input.mp464,841 KB12/12/2021 1:36 AM
16.relationship between select lines and inputs of a mux.mp436,673 KB12/12/2021 1:36 AM
17.cascading multiplexers - ex 1.mp424,242 KB12/12/2021 1:36 AM
18.cascading multiplexers - ex 2.mp414,021 KB12/12/2021 1:36 AM
19.cascading multiplexers - ex 3.mp423,289 KB12/12/2021 1:36 AM
2.AND-OR OR-AND realization.m4v107,205 KB12/12/2021 1:36 AM
20.Expansion of multiplexers.mp4171,973 KB12/12/2021 1:36 AM
21.Assigning select lines while expanding the MUX.mp461,959 KB12/12/2021 1:36 AM
22.Introduction to Demultiplexer.mp4145,536 KB12/12/2021 1:36 AM
23.introduction to decoder.mp496,652 KB12/12/2021 1:36 AM
24.implementing functions with decoder example 1.mp423,152 KB12/12/2021 1:36 AM
25.implementing functions with decoder example 2.mp465,644 KB12/12/2021 1:36 AM
26.decoder for function implementation - ex3.mp428,121 KB12/12/2021 1:36 AM
27.converting one code to other code using decoder.mp4112,757 KB12/12/2021 1:36 AM
28.ROM implementation using decoder.mp484,295 KB12/12/2021 1:36 AM
29.Implementing Functions using only Decoder.mp451,760 KB12/12/2021 1:36 AM
3.Minimum No of NAND gates example.m4v22,066 KB12/12/2021 1:36 AM
30.Implementing Functions using Decoder and Multiplexer Example 1.mp474,428 KB12/12/2021 1:36 AM
31.Implementing Functions using Decoder and Multiplexer Example 2.mp485,715 KB12/12/2021 1:36 AM
32.Decoder with Enable Input.mp479,350 KB12/12/2021 1:36 AM
33.Constructing 3x8 Decoder using 1x2 Decode.mp455,029 KB12/12/2021 1:36 AM
34.Constructing 4x2 Decoder using 1x2 Decoder.mp438,465 KB12/12/2021 1:36 AM
35.Constructing 6x64 Decoder using 3x8 Decoder.mp456,147 KB12/12/2021 1:36 AM
36.Expansion of Decoder in general.mp477,742 KB12/12/2021 1:36 AM
37.Constructing 7x128 Decoder using 3x8 Decoder.mp464,650 KB12/12/2021 1:36 AM
38.Expansion of Decoders in another way.mp482,575 KB12/12/2021 1:36 AM
39.Address Expansion of ROM.mp483,827 KB12/12/2021 1:36 AM
4.NOR - NOR example.m4v36,340 KB12/12/2021 1:36 AM
40.Word Expansion of ROM.mp462,498 KB12/12/2021 1:36 AM
41.Finding the Address ranges of Devices.mp423,450 KB12/12/2021 1:36 AM
42.Example on Enabling a Device.mp445,615 KB12/12/2021 1:36 AM
43.Finding the address ranges of Memory Devices.mp4119,890 KB12/12/2021 1:36 AM
44.Introduction to Encoders.mp4101,146 KB12/12/2021 1:36 AM
45.Priority Encoders.mp448,854 KB12/12/2021 1:36 AM
46.Introduction to Hazards.mp449,082 KB12/12/2021 1:36 AM
47.Hazards and test vectors.mp446,618 KB12/12/2021 1:36 AM
48.Examples on Test Vectors.mp456,050 KB12/12/2021 1:36 AM
49.Half Adder.mp424,287 KB12/12/2021 1:36 AM
5.Minimum No of NOR gates Example.mp414,427 KB12/12/2021 1:36 AM
50.Full Adder.mp460,024 KB12/12/2021 1:36 AM
51.Ripple Carry Adder.mp456,238 KB12/12/2021 1:36 AM
52.Carry Lookahead Adder.mp493,489 KB12/12/2021 1:36 AM
53.Carry look ahead adder implementation.mp451,732 KB12/12/2021 1:36 AM
54.Hybrid adder.mp441,950 KB12/12/2021 1:36 AM
55.Serial adder.mp442,839 KB12/12/2021 1:36 AM
56.Binary adder-subtractor.mp455,665 KB12/12/2021 1:36 AM
57.BCD adder.mp468,441 KB12/12/2021 1:36 AM
58.Invalid combinations for BCD adder.mp426,247 KB12/12/2021 1:36 AM
59.2 bit comparator.mp495,217 KB12/12/2021 1:36 AM
6.Minimum Noof NOR gates Example.mp411,653 KB12/12/2021 1:36 AM
60.3 4 bit comparators.mp451,428 KB12/12/2021 1:36 AM
61.Analysing all the cases of comparators.mp440,243 KB12/12/2021 1:36 AM
62.Gate 2016 question on multiplexer.m4v11,908 KB12/12/2021 1:36 AM
63.Time complexity of ripple carry adder.m4v11,218 KB12/12/2021 1:36 AM
64.Time complexity carry look ahead adder.m4v59,345 KB12/12/2021 1:36 AM
7.EX-OR and EX-NOR implementation with NOR and NAND gates.mp452,763 KB12/12/2021 1:36 AM
8.Half adder.mp422,512 KB12/12/2021 1:36 AM
9.Half subtracter.mp425,103 KB12/12/2021 1:36 AM